1.1 C62x assembly primer ii  (Page 4/8)

Addition, subtraction and multiplication

There are several instructions for addition, subtraction and multiplication on C62x CPU. The basic instructions are ADD , SUB , and MPY . Learn about these instructions in the TI manual. ADD and SUB have 0 delay slots (meaning the results of operation are immediately available), but the MPY has 1 delay slot (the result of multiplication is valid after additional 1 clock cycle).

Branching and conditional operations

Often you need to control the flow of the program execution by branching to another block of code. The B instruction does the job in the C62x CPU. The address of the branch can be specified either bydisplacement or stored in a register to be used by the B instruction. Read and understand the B instruction in the manual. The B instruction has 5 delay slots, meaning that the actual branch occurs in the 5th clock cycleafter the instruction is executed.

In many cases, depending on the result of previous operations, you execute the branch instructionconditionally. For example, to implement a loop, you decrement the loop counter by 1 each time you run a set ofinstructions and whenever the loop counter is not zero, you need to branch to the beginning of the code block to iteratethe loop operations. In C62x CPU, this conditional branching is implemented using the conditional operations . Although B may be the instruction implemented using conditional operationsmost often, all instructions in C62x can be conditional.

Conditional instructions are represented in code by using square brackets, [ ] , surrounding the condition register name. For example, the following B instruction is executed only if B0 is nonzero:

To execute an instruction conditionally when the condition register is zero, we use ! in front of the register. Forexample, the B instruction is executed when B0 is zero.

Not all registers can be used as the condition registers. In C62x CPU, the registers that can be tested in conditionaloperations are B0 , B1 , B2 , A1 , A2 .

Logical operations and bit manipulation

The logical operations and bit manipulations are accomplished by the AND , OR , XOR , CLR , SET , SHL , and SHR instructions. Read and understand the operations of these instructions.

Other assembly instructions

Other useful instructions include IDLE and compare instructions such as CMPEQ etc. Read and understand the operations of these instructions.

C62x instruction set summary

The set of instructions that can be performed in each functional unit is as follows (See , , and ). Please refer to TMS320C62x/C67x CPU and Instruction Set Reference Guide for detailed description of each instruction.