0.2 Control lab setup: using labview to control ecp plants  (Page 2/3)

The portion of the code which sends signals to the drive motor has been written such that a positive controleffort results in a counterclockwise (when viewed from the shaft) rotation of the drive motor. Therefore, for the 210 plant, thiswill result in an input force to the right. For the 205 plant, this will result in a clockwise input torque at the base disk.

If you decide to write new FPGA code using the LabVIEW Embedded Project Manager, use the following tables as areference for assigning FPGA channels:

• Note that if you use the ECP pendulum accessory and are required to connect the pendulum encoder cable manually to theterminal block inside the amplifier box, then you should connect the +5V and ground wire to pins 2 and 4, respectively, on theterminal block. This is due to the fact that the National Instruments ECP to RIO cable maps the +5V and ground channels forall the encoders to only pins 2 and 4 on the terminal block. ECP may instruct you to connect the +5V and ground wires for encoder 4to pins 1 and 3 on the terminal block; however, doing so will result in the encoder not receiving power.
• Encoder Counts Per Revolution
  • Encoder 1: 16000 counts = 360 degrees
  • Encoder 2: 16000 counts = 360 degrees
  • Encoder 3: 16000 counts = 360 degrees
  • Encoder 4: 16384 counts = 360 degrees (pendulum encoder) **

Autorunning fpga vis to zero analog outputs:

To ensure that the system has the correct power on states when the real-time target is booted but before thecontrol loop VI is run, you should configure the target to autorun the FPGA VI at power on. To enable this feature, the “Autorun VI”option should be selected when building the FPGA project code. Then, in the LabVIEW Embedded Project Manager, select Tools>>Download VI or Attributes to Flash Memory. In this window, you can download the FPGA VI from the host machine to the flashmemory on the target and configure autoload options. See Chapter 4 of the LabVIEW FPGA Module User’s Manual for moreinformation.

Using the real-time vi for control system experiments

Starting-point vi’s for each plant

• LabVIEW Real Time for ETS Example VIs
  • ECP 205 and 210 LabVIEW 8.0 Project: ECP_LabVIEW_8.0_Starting_Point.zip (download) - FPGA personality included
  • ECP 205 and 210 LabVIEW 7.1 Project: ECP_LabVIEW_7.1_Starting_Point.zip (download) - FPGA personality included
• LabVIEW Real Time for RTX Example VIs
  • ECP 210 Rectilinear Plant: not yet posted
  • ECP 205 Torsional Plant: not yet posted

Usage instructions

Extract all folders and VIs to a directory on your host PC. Be sure to keep the file and folder paths intact toavoid having to relocate VIs. The files in the FPGA VIs and Sub VIs folders do not need to be changed. Target your real-time devicefrom the LabVIEW start-up screen and then open the example ECP 210 1DOF PID.vi. You will see the front panel shown below: