9.1 Sspd_chapter 7_part 1_the art of microchip fabrication transforms  (Page 2/4)

Figure 7.2. VLSI Design at Circuit Design and Physical Design Level.

In this SSPD_ Chapter 7 we are concerned with physical design level.

The layout of a CMOS inverter is shown below. In course of the discussion of Chapter 7 we will arrive at the particular layout of CMOS as shown in Figure 7.3

Figure Prin Figure 7.3. CMOS Layout on IC Chip. CMPE 315

7.2. Hierarchy and Abstraction

Moore’s Law states : Integration density doubles every 18 months.

For example, Microprocessors:

The million transistor/chip barrier crossed in ‘88 with the 486. Today we have more than 100 million transistors on a single chip in Pentium IV..

Impact of this revolution on design is:

Hand crafting not possible anymore for designing a pentium IV (as was done for the 4004).

Hierarchy is used in the design of complex VLSI circuits.

A large system can be partitioned into many units. Each unit can have functional blocks,

Functional blocks are built from cells, cells are ultimately constructed from transistors.

The processor is a collection of modules each composed of cells. Re-use of cells reduces design effort.

In Figure 7.4, the hierarchical levels of VLSI Design is shown. It is top-down approach.

Figure 7.4. Hierarchical Level Representation of VLSI Design.

Abstraction is also used in digital designs. It is critical for dealing with the design complexity.

Entire CAD design frameworks are based on this design philosophy.

These have made it possible to achieve current design complexity.

Examples of CAD tools for digital design are:

Simulators that work at various complexity levels.

Design verification tools.

Place and Route tools. (Layout generation)

Logic synthesis tools.

Standard cells are a popular design style that makes layout generation easy.

Layouts of basic gates such as AND, OR, NAND, NOR, and NOT as well as

arithmetic and memory modules are provided as input.

These cells are designed with similar characteristics, such as constant height,

and can be manipulated easily to generate a layout.

Place-and-Route tools can use these libraries and generate layouts using logic level description of the design.

Digital Circuit Design

If design automation solves all the problems, why be concerned with digital circuit

design?

Reality is more complex and a knowledge of digital circuit design will be important

for some time to come.

Someone has to design and implement the module libraries.

Porting from technology generation to technology generation (different feature

sizes) is NOT automatic.

This occurs approximately every two years!

􀂁Creating an adequate model of a cell/module requires an in-depth understanding

of its internal operation.

􀂁The library-based approach does NOT work for all situations, i.e. high performance

sub-systems in designs like microprocessors.

The abstraction-based approach is only correct to a certain degree.

Performance of a module, i.e. an adder, is substantially influenced by the way

it is connected in its environment ( interconnect parasitics ).

􀂁Scaling tends to emphasize other deficiencies of the abstraction-based approach.