8.3 Sspd_chapter 6_part 3_the challenges of ic technology  (Page 4/5)

1. To develop advanced IC-manufacturing Technologies which would enable dramatic improvements in process control, cycle-time and overall flexibility;
2. Continue scaling in deep-submicron level in a cost effective manner.

Under MMST program, technical feasibility of 100% single-wafer processing, dynamic/object oriented Computer-Integrated-Manufacturing(CIM), real time/model based process control, in-situ sensors, 95% dry processing and integrated mini environment was well demonstrated. Till 1993 it was 60% single-wafer processing and 40% batch processing was in vogue. But after 1993, 100% single wafer process tools are available.

Figure 6.30 Scaling of Logic Chips.

MMST has developed processing chambers in which sample wafers were heated by Rapid Thermal Processing(RPT) Lamps under multi-zone, closed-loop wafer-temperature control. Stanford University, Applied Materials Inc., subsequently introduced RTP in their Centura cluster tools. MMST also created the first lithography cluster tool.

In 1992, Semiconductor Industry Association(SIA) invited 179 key Semiconductor Technologists at Irving, Texas, to chalk out the Road Map of scaling of MOS devices for the next 15 years as given in Table 6.8.

They identified 5 areas of critical challenge which could impede or stop the progress of scaling.

• Patterning material and processes for device structures below 0.25um
• Electrical interconnections, both on and off chip
• Electrical test, time cost and capability
• Design, modeling, simulation capability for all elements of IC technology and products
• Software capability, availability and quality for all aspects of IC technology and production.

Table 6.8_1992 SIA Overall Roadmap Technology Characteristics

Before 1980, there used to be Integrated Device Manufacturers(IDM) which were vertically integrated. They designed , fabricated and marketed their chips. Start-up companies, who could not afford a foundary, used IDM’s excess capacity to fabricate their chips. But after 1980 as Process Technology Scaling became more systematic, R&D and Design got bifurcated from the Foundries. A few major Foundries, situated in third world undeveloped or underdeveloped, catered to the needs of numerous Fab-less companies which concentrated their resources on the end market. Taiwan Semiconductor Manufacturing Corporation (TSMC) is one such foundries which enables a lower capital cost because of cheap labour. This allows the Fab-less companies to concentrate on their R&D. This makes a lot of economic sense.