8.29 Sspd_chapter 6_part 9_appendix device physics  (Page 12/8)

SSPD_Chapter 6_Part 9_Appendix Device Physics

Section I. The Bipolar Junction Transistor Technology in 60’s-70’s.

In 1959 at the time IC Technology was invented, the vertical NPN transistor looked as given in Figure I.

Figure I. Cross-sectional view and Plan view of Vertical NPN transistor.

(25um by 37.5um base stripe geometry)

Total area covered 212 μm by 250 μm

Substrate is 100um thick.

Epitaxial layer is 10um thick.

Base Collector Junction is at 3um depth and Emitter-Base Jn. at 2um depth.

Hence Base Width = W _B = 1 um thick.

P Substrate- ρ=10 Ω-cm, N _A = 10 ¹⁵ Boron atoms/cc;

Buried Layer has been put to reduce Collector Series Resistance.

N _D =10 ¹⁹ Arsenic Atoms/cc; In buried layer Arsenic is used as donor type dopent because it has much lower diffusion coefficient hence almost negligible out diffusion in subsequent diffusion and heating cycles.

N Epitaxial layer- ρ= 0.1 Ω-cm, N _D = 10 ¹⁶ Phosphorous Atoms/cc;

Base layer- N _A = 10 ¹⁷ Boron Atoms/cc; Base layer has a sheet resistance of 200 Ω/sq.

Emitter and Collector Contact layer- N _D = 10 ¹⁹ Phosphorous Atoms/cc, R _sh = 1Ω/sq;

Section II. The Bipolar Junction Transistor Technology in 1980’s-2000’s.

Gordon Moore is a co-founder of Intel and he made an empirical observation which became a Law . It stated :

“ at our rate of technological development, the complexity of an integrated circuit, with respect to minimum component cost will double in about 24 months”.[“Cramming more components onto Integrated Circuits”, Electronics Magazine, 19 April 1965]. The law has held the test of time to date as is evident from Table I.4_50 years journey of IC Technology_Appenidix I.

Today Moore’s Law has become a self fulfilling prophecy and a goal Industry tries to achieve all the time. In attempting to maintain this rate of growth, enormous R&D has gone into the development of tools and equipments required for IC fabrication and into the advancement of processing techniques required for IC fabrication.

Section III.1. The relation between the physical parameters and performance parameters and Physics of High Performance nano BJT.

In CB BJT:

Here α _F = γ×β*

= (Emitter Injection Efficiency) × (Base Transport Factor)

Current Transfer Ratio

In Eq. I , M = Avalanche Multiplication Factor =

Where n is Miller Indices ranging from 2 to 7.

At normal Collector to Base Voltages, M = 1

But as V _CB becomes large approaching BV _CBO , M becomes a very large number and eventually it becomes infinite at V _CB = BV _CBO . This is known as CB Junction Breakdown by Avalanche mechanism.

At low doping we have to invoke Impact Ionization Model or Avalanche Mechanism. At doping densities larger than 10 ¹⁸ dopent /cc we must invoke mechanism of tunnelling also known as Zener Breakdown Model.

As seen in Figure II, area enclosed by Forward Active Mode bracket is the Forward Active Mode region of operation of CB BJT. In this region the active device behaves as a linear device and is suitable for linear applications. The safe operating voltage range extends from 0 V to (BV _CBO – 2 V) in CB BJT.