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You will implement the complete system shown in Digital Transmitter: Introduction to Quadrature Phase-Shift Keying . Then you will optimize the system for execution time. Theoptimization process will probably be much easier if you plan for optimization before you begin any programming.
Once you have planned your program strategy, implement the PN generator from Digital Transmitter: Introduction to Quadrature Phase-Shift Keying and verify that it is working. You may wish to refer to the description ofassembly instructions for logical operations in Section 2-2 of the Mnemonic Instruction Set reference. Initialize the shift register to one.
For your transmitter implementation, use the signal constellation shown in Digital Transmitter: Introduction to Quadrature Phase-Shift Keying , a digital carrier frequency of and a digital symbol period of samples.
Viewing the transmitted signal on the oscilloscope may help
you determine whether your code works properly, but youshould check it more carefully by setting breakpoints in
Code Composer and using the
Memory
option from
the
View
menu to view the contents of memory.
A
vector signal analyzer (
VSA )
provides another method of testing, which is described in
Vector Signal Analyzer: Testing a
QPSK Transmitter .
One objective of this exercise is to teach optimization and
efficient code techniques. For this reason, your performancewill be judged primarily on the total execution time of your
system. Note that by execution time we mean cycle count,not the number of instructions in your program. Remember
that several of the TI TMS320C54xx instructions take morethan one cycle. The multicycle instructions are primarily
the multi-word instructions, including instructions thattake immediates, like
stm
, and instructions
using direct addressing of memory (such as
ld
*(temp),A
). Branch and repeat statements also
require several cycles to execute. The
Mnemonic
Instruction Set reference will tell you how many
cycles required for each instruction; make sure you look atthe cycle count for the syntax you are using. It is also
possible to use the debugger to determine the number ofcycles used by your code.
You will be graded based on the number of cycles used
between the return from one
WAITDATA
call and
the arrival at the next
WAITDATA
call. If the
number of cycles between one
WAITDATA
and the
next is variable, the maximum possible number of cycles willbe used. You must use the
core.asm file as provided; this file may not be modified. You
explicitly may not change the number of samples read andwritten by each
WAITDATA
call! We reserve the
right to test your code by substituting the
test
vector core file .
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