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The following exercise will show you how to manipulate the clocking system on the ez430. You will need to refer to the ez430's Schematic and User's Guide to correctly configure the clock as specified.
In order to easily check the state of the clock, output MCLK/SMCLK (they are both defaulted to the same source) from a pin header (HINT: Output the SMCLK from P1.4 on pin 6). Use the oscilloscope to observe the frequency of the clock, and to see the impact of the changes you will make.
The following is code to set the MSP430 to operate off of the VLO clock. The only problem is that it doesn't work. Macro definitions and logic operations are incorrectly used (although the comments are correct). Without adding or removing any lines of code, properly source the MSP430 off the VLO clock.
WDTCTL & ~WDTPW + WDTHOLD; // Stop watchdog timer
BCSCTL1 |= LFXT1S_2; // LFXT1 = VLO
IFG1 = OFIFG; // Clear OSCFault flag
__bis_SR_register(SCG1 + SCG0); // Stop DCO
Now using these timer settings, repeat number 3 from this lab's problem 1.
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