2.3 Overview of the arm embedded processors from texas instruments  (Page 2/3)

Concerto™ microcontrollers. Concerto F28M35x microcontrollers combine TI’s performance C28x™ core and control peripherals with an ARM Cortex-M3 core and connectivity peripherals to deliver a clearly partitioned architecture that supports real-time control and advanced connectivity in a single MCU.

Hercules™ microcontrollers. For high-reliability applications such as transportation, the TMS570 provides DSP-like performance with safety-critical features implemented in hardware to ensure continuous and uninterrupted operation. The TMS570 has a dual-core architecture, with the second core running in lockstep for redundancy and self-checking.

Sitara™ microprocessors. Offering performance up to 1.5 GHz, Sitara ARM MPUs are ideal for applications needing a high-level operating system, wired and wireless network connectivity, concurrent applications, and support for rich graphics with an advanced user interface.

OMAP™ multicore microprocessors. The OMAP platform for digital media processing brings together an ARM core with advanced video acceleration, plus a high-performance C6000™ DSP for applications that need to support real-time video, image and audio data processing. With the ability to provide computationally intensive real-time signal-processing performance, developers can implement complex applications such as video analytics, speech recognition, baseband channel management and power monitoring with a single chip.

Deep dive into Cortex-M – Stellaris ARM Cortex-M4F

Stellaris microcontrollers (MCUs) are 32-bit, RISC-based mixed-signal processors designed specifically for ease of use and connectivity. Common applications include end-equipment in the computing, industrial and smart grid markets.

To get a better idea of what Stellaris MCUs are and how they can be used to solve an application problem, let’s take a look at a typical block diagram for the device. Figure 2 shows the block diagram for the LM4F232H5, one of the LM4F devices.

The block diagram provides guidance on the key features of a particular device. Let’s take a closer look at some of the more prominent features. (Most of this section is transcribed from the LM4F232H5QC data sheet, available at http://www.ti.com/lit/gpn/lm4f232h5qc . )

• Integrated memory:
  • Includes both volatile (RAM) and nonvolatile (flash, EEPROM) memories.
  • EEPROM supports an endurance of up to 500,000 writes.
  • Read-only memory (ROM) includes the software libraries used to program peripherals.
• Analog:
  • ADC: two 12-bit SAR ADCs, each with up to 12 channels of single- or dual-ended inputs.
  • Comparators: three analog comparators, each with two.
• Serial communications peripherals – both synchronous and asynchronous:
  • Two controller area network (CAN) 2.0 A/B controllers.
  • USB 2.0 controller, supporting USB On-the-Go, host and device modes.
  • Eight universal asynchronous receiver/transmitter (UART) modules, capable of infrared data (IrDA), 9-bit and ISO 7816 modes.
  • Six inter-integrated circuit (I2C) modules.
  • Four serial peripheral interface (SPI) modules.
• Motion control:
  • Two PWM modules, with a total of 16 advanced PWM outputs for motion and energy applications.
  • Eight fault inputs to promote low-latency shutdown.
  • Two quadrature encode inputs (QEIs).
• GPIOs:
  • The 64-LQFP has a maximum of 43 GPIOs; the 100-LQFP package has a maximum of 69 GPIOs; the 144-LQFP has a maximum of 105 GPIOs.
  • All pins have configurable pullup and pulldown resistors.
• Timers:
  • Systick timer – A 24-bit system timer.
  • Twelve general-purpose timers – each 32 bits, with up to two capture/compare inputs.
  • Two watchdog timers – each 32 bits.
• Hibernation module (HIB):
  • In HIB mode, power supplies are turned off to the main part of the microcontroller and only the hibernation module circuitry is active. An external wake event or RTC event is required to bring the microcontroller back to run mode.
• Oscillators:
  • Precision internal oscillator (PIOSC) – on-chip oscillator; operates at 16 MHz ±1 percent at room temperature.
  • Main oscillator (MOSC) – connection for a single-ended clock source to OSC0 or a high-frequency external crystal [5-25 MHz].
  • Hibernation module clock source – connection for a 32.758-kHz oscillator.
• CPU and debugging capabilities:
  • 80 MHz is the maximum CPU clock speed for the LM4F232.
  • Other core modules:
    • Nested vector interrupt controller (NVIC) – provides programmable interrupt priority and low-latency interrupt handling, including automatic nesting of interrupts.
    • Memory protection unit (MPU) – divides the memory map into a number of regions and defines the location, size, access permissions and memory attributes of each region.
    • Floating-point unit (FPU) – supports single-precision add, subtract, multiply, divide, multiply and accumulate, and square-root operations. It also provides conversions between fixed- and floating-point data formats.
  • Debugging modules:
    • Joint Test Action Group (JTAG) port – an IEEE-standard, four-pin debugging interface used to communicate with the LM4F232 during debugging.
    • Single-wire debugging/test (SWD/T) port – an ARM-standard two-pin debugging port, provided as an alternative to JTAG.
    • Embedded trace module (ETM) – a real-time trace module providing instruction and data tracing of the Cortex-M4F core.
    • Author’s note: Leveraging the ETM requires the use of a nonstandard debugging tool as well as hardware that supports an ETM connection. Although the debugging tools exist, no hardware that supports an ETM connection is available as of September 2012. See www.ti.com/stellaris for any updates on the LM4F kits that are available.