1.9 Part 9_journey of ic

Reference materials:ECE4121/ECE4141,VLSI Design,Design Metrics by AHM Zahirul Alam.

Cost of IC Chip=Non-recurring expenditure(NRE)+Recurring Expenditure(RE)

NRE is the fixed cost of mask generation. It is one-time cost factor.

RE is the expenditure incurred in Silicon procesing, packaging, volume of production and the die area.

70nm ASIC incurs $4M NRE on account of masks.

"The club of people who can offer an extreme sub-micron ASIC or COD design is getting pretty exclusive."Ron Wilson,EE Times (May,2000)

The Cost Metrics of the IC Chip.

M.L.-metal layers, L.W.-line width,W.C.-Wafer Cost,W.D.-Wafer Diameter(mm),D./cm^2-defects per cm square,D.S.-die size(mm),D(mm^2)-Die Area(mm square),D/W-Dies/Wafer, Y-Yield,D.C.-Die Cost($)

Algorithm for calculating the die cost:

Recurring costs:

Variable Cost =

Where : Cost of Die =

die yield= [1+((defect/area)*(die area))/alpha]^(-alpha)

One example:

Wafer size = 12’’ = 30.48 cm;

Die size = 2.5 cm ² ;

1 defect/cm ² ;

alpha=α= 3( complexity);

Number of dies per wafer = 252 dies /wafer;

Die yield = 16 %;

252×0.16 = 40 die/wafer;

40 die per wafer can actually be marketed.

Hence die cost = wafer cost/40 ;

Die cost is a strong function of die area.

Die cost is proportional to the Nth power of die area where n=3 to 4.