12.1 Video processing: introduction to the idk

Introduction

The purpose of this lab is to acquaint you with the TI Image Developers Kit ( IDK ). The IDK contains a floating point C6711 DSP, and other hardware thatenables real time video processing. In addition to the IDK, the video processing lab bench is equipped with an NTSC cameraand a standard color computer monitor.

You will complete an introductory exercise to gain familiarity with the IDK programming environment. In the exercise, youwill modify a C skeleton to horizontally flip and invert video input from the camera. The output of your video processingalgorithm will appear in the top right quadrant of the monitor. In addition, you will analyze existing C code thatimplements filtering and edge detection algorithms to gain insight into IDK programming methods. The output of these"canned" algorithms, along with the unprocessed input, appears in the other quadrants of the monitor.

An additional goal of this lab is to give you the opportunity to discover tools for developing an originalproject using the IDK.

Video processing setup

The camera on the video processing lab bench generates an analog video signal in NTSC format. NTSC is a standard fortransmitting and displaying video that is used in television. The signal from the camera is connected to the "compositeinput" on the IDK board (the yellow plug). This is illustrated in Figure 2-1 on page 2-3 of the IDK User's Guide . Notice that the IDK board is actually two boards stacked on top of each other. The bottom boardcontains the C6711 DSP, where your image processing algorithms will run. The top board is the daughterboard, which containshardware for interfacing with the camera input and monitor output. For future video processing projects, you may connecta video input other than the camera, such as the output from a DVD player. The output signal from the IDK is in RGB format,so that it may be displayed on a computer monitor.

At this point, a description of the essential terminology of the IDK environment is in order. The video input is firstdecoded and then sent to the FPGA, which resides on the daughterboard. The FPGA is responsible for the filling of theframe buffer and video capture. For a detailed description the FPGA and its functionality, we advise you to read Chapter 2 of the IDK User's Guide .

The Chip Support Library ( CSL ) is an abstraction layer that allows the IDK daughterboard to be usedwith the entire family of TI C6000 DSPs (not just the C6711 that we're using); it takes care of what is different fromchip to chip.

The Image Data Manager ( IDM ) is a set of routines responsible for moving data between on chipinternal memory and external memory on the board during processing. The IDM helps the programmer by taking care ofthe pointer updates and buffer management involved in transferring data. Your DSP algorithms will read and write tointernal memory, and the IDM will transfer this data to and from external memory. Examples of external memory includetemporary "scratch pad" buffers, the input buffer containing data from the camera, and the output buffer with data destinedfor the RGB output.