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Another notable example of SIMD extensions implemented in commodity microprocessors is the NEON extension to the ARMv7 architecture. The Cortexfamily of processors that implement ARMv7 are widely used in mobile, handheld and tablet computing devices such as the iPad, iPhone and Canon PowerShot A470,and the NEON extensions provide these embedded devices with the performance required for processing audio and video codecs as well as graphics and gamingworkloads.
Compared to SSE and AVX, NEON has some subtle differences that can greatly improve performance if used properly. First, it has dual lengthSIMD vectors that are aliased over the same registers; a pair of 64-bit registers refers to the lower and upper half of one 128-bit register – incontrast, the AVX extension increases the size of SSE registers to 256-bit, but the SSE registers are only aliased over the lower half of theAVX registers. Second, NEON can interleave and de-interleave data during vector load or store operations, for up to four vectors of four elementsinterleaved together. In the context of FFTs, the interleaving/de-interleaving instructions can be used to reduce or eliminatevector permutations or shuffles.
In the previous examples, the data was stored in interleaved format (i.e., the real and imaginary parts composing each element of complex data are storedadjacently in memory), but operating on the data in split format (i.e., the real parts of each element are stored in one contiguous array, while theimaginary parts of each element are stored contiguously in another array) can simplify the computation when using SIMD. The case of complexmultiplication illustrates this point.
static inline __m128 MUL_INTERLEAVED(__m128 a, __m128 b) {
__m128 re, im; re = _mm_shuffle_ps(a,a,_MM_SHUFFLE(2,2,0,0));
re = _mm_mul_ps(re, b); im = _mm_shuffle_ps(a,a,_MM_SHUFFLE(3,3,1,1));
b = _mm_shuffle_ps(b,b,_MM_SHUFFLE(2,3,0,1)); im = _mm_mul_ps(im, b);
im = _mm_xor_ps(im, _mm_set_ps(0.0f, -0.0f, 0.0f, -0.0f)); return _mm_add_ps(re, im);
}
SSE multiplication with interleaved complex data
The function in
[link] takes complex data in two
4-way single precision SSE registers (
a and
b ) and performs
complex multiplication, returning the result in a single precision SSEregister. The SSE intrinsic functions are prefixed with `
_mm_ ',
and the SSE data type corresponding to a single 128-bit single precisionregister is `
__m128 '.
When operating with interleaved data, each SSE register contains two complex numbers. Two shuffle operations at lines 3 and 5 are used to replicatethe real and imaginary parts (respectively) of the two complex numbers in input a . At line 4, the real and imaginary parts of the two complex numbers in b are each multiplied with the real parts of the complex numbers in a . A third shuffle is used to swap the real and imaginary parts of the complex numbers in b , before being multiplied with the imaginary parts of the complex numbers in a – and the exclusive or operation at line 8 is used to selectively negate the sign of the real parts in this result.Finally, the two intermediate results stored in the re and im registers are added. In total, seven SSE instructions are used to multiply two pairs of single precision complex numbers.
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