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Next, choose Auto-->Rename Components . You silkscreen should look a lot different now.

Before Renaming
After Renaming

Since you have changed the reference designators in your design, you need to generate a swap file and perform back annotation. You should do this IMMEDIATELY . If you don’t, it can cause some serious problems for you later in the design. When you read the swap file into Capture, you may get errors on renaming the mounting holes. It is safe to ignore these.

Checking for errors

The next step in the design process is to check for any spacing errors. OrCAD uses the spacing variable that you set earlier to determine if there are errors in your design. We used 10 mil spacing from all features as a minimum for this design. To perform a Design Rule Check (DRC) choose Auto-->Design Rule Check… from the menu.

Make sure all the Check Rule Settings are checked and click OK . Your design will rarely contain no errors, and you will need to look at the errors spreadsheet to see what the errors are. Some can be safely ignored.

In this example there are four Pad Spacing Errors, one generated by each of the mounting holes. In this case OrCAD is complaining because the place outline for the part is on the edge of the board. This error is OK to ignore. If there are errors that need to be fixed, you can delete the marker from the spreadsheet. Let’s generate a route spacing error so you can see what it looks like. These are the most important. Move a trace anywhere in your design so that it conflicts with another trace or pad.

Now rerun the DRC. The new errors should appear in the spreadsheet.

You can remove the errors by moving the trace back to its original position. Once the error has been corrected, you can delete the marker from the errors spreadsheet. Do not try to use the Auto-->Remove Violations tool. It is tempting, but it will actually rip up offending traces and move parts. You will end up having to do a lot of cleanup and rerouting after using this tool.

Cleaning up&The design

Now it is time to clean up your design. You should think of your board as a work of art. Other people may look at it, so you want it to look nice. Furthermore, a clean design will ensure fabrication success. When cleaning the design, the following should be kept in mind.

A. Route Spacing – You have set a minimum of 10 mils for feature spacing in your design. However, do not pack traces closely together unless you have to. First, you can push the manufacturing limits to far and some of your boards may come back bad. Second, routing traces closely together is generally a bad idea because this can result in undesired mutual inductance between traces.

B. Right Angles in Traces – Don’t use right angles in routing your traces. Miter the corners.

BAD
GOOD

C. Pad Exits – Trace exits from pads should be clean and not come out of the pad at unusual angles.

BAD
GOOD

D. Remove Extra Vias – Vias add cost to a board, so it is a good practice to remove any unnecessary vias from your design.

E. Drills – Drills require some special attention. First, you need to fix the error you got earlier about the drills. This error occurs sometimes after you perform an ECO. To see the problem, make the Drill Drawing (DRD) layer visible. Press Backspace to clear the display and then Shift-5 to display just the DRD layer.

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Source:  OpenStax, High-speed and embedded systems design (under construction). OpenStax CNX. Feb 18, 2004 Download for free at http://cnx.org/content/col10212/1.12
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