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Microprocessors provide a number of ways to specify the location
of data to be used in calculations. For example, one of thedata values to be used in an
add instruction may be
encoded as part of that instruction's
opcode , the
raw machine language produced by the assembler as it parses yourassembly language program. This is known as
immediate
addressing . Alternatively, perhaps the opcode will
instead contain a memory address which holds the data(
direct addressing ). More commonly, the instruction
will specify that an auxiliary register holds the memory addresswhich in turn holds the data (
indirect addressing ).
The processor knows which addressing mode is being used byexamining special bit fields in the instruction opcode.
Knowing the basic addressing modes of your microprocessor is important because they map directly into assembly languagesyntax. Many annoying and sometimes hard-to-find bugs are caused by inadvertently using the wrong addressing mode in aninstruction. Also, in any assembly language, the need to use a particular addressing mode often dictates which instruction onepicks for a given task.
Chapter five, Data Addressing , in the CPU and Peripherals reference contains extended descriptions of most of the addressing modes described below.
Whenever the abbreviations
src or
dst are used in the assembly language syntax
description for an instruction, it means that only theaccumulators
A and
B may be used for
that particular operand. These are seen everywhere, but twoclassic examples are
ld , which always loads data
into an accumulator from somewhere else, and
sth/stl , which always store data from an
accumulator to somewhere else.
Examples:
ld *AR5,A ; sets A = (contents of memory location pointed to by AR5)
sth B,*AR7+ ; sets (contents of memory location pointed to be AR7) = B,
; and then increments AR7 by one
Many of the TMS320C54x registers are memory-mapped, meaning
that they occupy real addresses at the low end of data memoryspace. The most commonly used of these are the auxiliary
registers
AR0 through
AR7 . Whenever
the abbreviation
MMR is used in the assembly
language syntax description for an instruction, it means thatany memory-mapped register may be used for that particular
operand. Only eight instructions use memory-mapped registeraddressing:
ldm ,
mvdm ,
mvmd ,
mvmm ,
popm ,
pshm ,
stlm , and
stm .
With
mvmm , since the instruction accepts two
memory-mapped register operands,
MMRx and
MMRy , only
AR0 -
AR7 and
SP may be used.
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